The problem
The client had picked the AWR2944 because it puts the 4 transmit and 4 receive radar transceiver, the DSP, the MCU and the hardware accelerator in one package. That moves the hard work off the silicon and onto the board. Every transmit and receive line off the chip is a 77 GHz transmission line that has to land on its patch element at the right phase. The array spacing has to match the chip's MIMO virtual array or the angle of arrival lands in the wrong bin. And the analog rails have a fixed start up order, or the chip latches into a protected state on the first power cycle.
What I did
I started from the pin out. The TX and RX pads sit at fixed positions on the package, so the feed lines leave those pads at the right impedance with no bend in the first millimetre and no via in the high frequency path. I mapped the chip onto a Rogers stackup, set the controlled impedance rules from the layer thickness, and ran the feeds on the top RF layer with stitched ground on the layer below so the return current stays under the line.
The patch array is sized for resonance at the band centre and spaced to the chip's phase centres, placed in the corner of the board so it sits under the radome the client had already tooled. On the digital side there is a CAN FD transceiver and an Ethernet PHY for the host, and a dedicated power sequencer brings the rails up in the order the data sheet asks for, with no firmware involved.
Decisions that shaped it
- Rogers laminate on the RF layers. FR4 at 77 GHz is a guess, not a substrate, and the loss you read off its data sheet is not the loss you get at this frequency.
- Antenna spacing taken from the chip's MIMO phase centres, because the array pattern is what the chip's post processing decodes.
- Stitched ground under every RF trace. At 77 GHz a missing stitch is an impedance bump you can measure.
- Power sequencing in hardware, not in firmware. The start up order is part of the data sheet and should not depend on code coming up correctly on every cold start.
Result
A manufacturable 77 GHz board where the antenna geometry, the substrate and the power tree all follow the chip's requirements rather than a guess.
